Role of FPGAs in Cloud and High Performance Computing Architectures

in Special Issue   Posted on March 18, 2021 

Information for the Special Issue

Submission Deadline: Sun 15 Aug 2021
Journal Impact Factor : 1.244
Journal Name : International Journal of Parallel Programming
Journal Publisher:
Website for the Special Issue: https://www.springer.com/journal/10766/updates/18971076
Journal & Submission Website: https://www.springer.com/journal/10766

Special Issue Call for Papers:

Field Programmable Gate Array (FPGA) is a kind of semiconductor logic chip that contains internal hardware blocks with user-programmable interconnects to specialize operations for a particular application. The interconnects can be easily reprogrammed to cope with design changes, and it even supports new applications throughout the lifetime of the part. Its potential to configure the hardware components and its ability to reconfigure and optimize it based on specific functions makes FPGA a significant choice in several applications. It offers custom solutions in circumstances where developing an application-specific integrated circuit (ASIC) is time-consuming and cost expensive in nature. In general, FPGAs is widely used for firmware development, system validation, and including pre-silicon validation. It is enabling the manufacturers to validate their design architectures before it is implemented at a real-time scenario.

Many applications in artificial intelligence (AI), image processing, enterprise networks, automotive assistive systems, and data centers hardware accelerators rely on FPGA for parallel execution of identical operations. FPGAs find a new path towards cloud and high-performance computing (HPC) systems with these emerging applications. The ever-increasing amount of data sources and growing demand for computing power are the two key enablers that force FPGA applications across cloud computing and HPC environment. Basically, a high-performance cloud acceleration architectures require certain characteristics, including high throughput measure to deal with large amounts of data, reduced latency to respond to the network devices appropriately, and flexibility to manage with evolving applications. CPU, GPU, FPGA, and ASIC are some of the architecture paradigms that widely accelerate HPC and cloud computing infrastructures. Among them, FPGA achieves the required objectives in a seamless way. In terms of performance, FPGA customizes specific application algorithms and offers higher data throughput. Latency wise, it supports parallelism and offers microsecond latency features with the same computing power as GPU. It offers improved scalability measures by easily adapting to evolutionary development requirements of storage and networking algorithms. When it comes to flexibility, it achieves system optimization with improved scalability measures. Further, it provides better performance with a reduced power consumption ratio.

It is because of these advantages, FPGA has merely moved from the state of conceptual observation to real-world use cases by proving its strength. This is where the role of FPGA becomes more prominent in cloud and HPC applications. And it is just a beginning, where exploring more against this background will significantly empower cloud computing and HPC system services. This special issue offers a forum for the researchers to design and implement various programming models, tools, and applications of FPGAs for cloud and HPC applications. The list of topics for the special issue includes but not constrained to the following:

  • Innovative methods, tools, and programming models to enhance the functionalities of FPGAs across cloud and HPC systems
  • Efficient algorithms for reconfigurable hardware
  • Logic synthesis and related tools for reconfigurable systems
  • Programming environments for reconfigurable systems to increase the rate of productivity
  • Recent advances and future trends in FPGA for cloud and HPC systems
  • New and innovative FPGA architectures for cloud and HPC applications
  • FPGA architecture design flow for cloud computing and HPC
  • FPGA design programming protocols for high performance cloud platforms
  • FPGA managed memories and reconfigurable cores
  • Sensor-integrated data processing with FPGA across cloud infrastructures
  • Reconfigurable computing applications

Tentative SI Timeline:

Manuscript Submission Deadline Date:         15, August 2021

Authors Notification Date:                               20, October 2021

Revised Papers Due Date:                             25, January 2021

Guest Editor Details

Lead Guest Editor:

Dr. Tu Nguyen

Assistant Professor,

Department of Computer Science,

Purdue University Fort Wayne,

Fort Wayne, USA.

Email: [email protected], [email protected]

Google Scholar: https://scholar.google.com/citations?&user=wZ6mimYAAAAJ

Dr. TU NGUYEN is currently an Assistant Professor in the Department of Computer Science, Purdue University Fort Wayne. He earned the Ph.D. degree in electronic engineering from the National Kaohsiung University of Science and Technology (formerly, National Kaohsiung University of Applied Sciences) in 2016. He was a Postdoctoral Associate in the Department of Computer Science & Engineering, University of Minnesota – Twin Cities in 2017. Prior to joining the University of Minnesota, he joined the Missouri University of Science and Technology as a Postdoctoral Researcher in the Intelligent Systems Center in 2016. His research interests include design and analysis of algorithms, network science, cyber-physical systems, and cybersecurity. He currently serves as an Associate Editor for IEEE Access (2019- ) and EURASIP Journal on Wireless Communications and Networking (2017- ). He is also on the Editorial Board of the Cybersecurity journal, Internet Technology Letters (2017- ), International Journal of Vehicle Information and Communication Systems (2017- ), International Journal of Intelligent Systems Design and Computing (2017- ), and IET Wireless Sensor Systems (2017- ), and has served as a TPC Chair for the NICS 2019, SoftCOM (25th), and ICCASA 2017, a Publicity Chair for iCAST 2017 and Big Data Security 2017, and a Track Chair for ACT 2017. He has also served as a technical program committee member for over 100 premium conferences in the areas of network and communication such as INFOCOM, Globecom, ICC, and RFID. He is a senior member of the IEEE.

First Co- Guest Editor:

Dr. Qingshan Liu,

Professor,

School of Information and Control,

Nanjing University of Information Science and Technology,

China.

Email: [email protected]

Google Scholar: https://scholar.google.com/citations?user=2Pyf20IAAAAJ&hl=en

Dr. Qingshan Liu is a Professor in School of Information and Control, Nanjing University of Information Science & Technology. He received his M.S. degree from Southeast University, Nanjing, China, in 2000, and the Ph.D. degree from the Chinese Academy of Sciences, Beijing, China, in 2003. He joined the National Laboratory of Pattern Recognition, Chinese Academy of Sciences. From 2004 to 2005, he was an Associate Researcher with Multimedia Laboratory, The Chinese University of Hong Kong, Hong Kong. From 2006 to 2011, he worked with the Computational Biomedicine Imaging and Modeling Center, Rutgers University, Department of Computer Science, Newark, NJ, USA, and The State University of New Jersey, Piscataway, NJ, USA. He is currently a Professor with the School of Computer Science and the School of Automation, Nanjing University of Information Science and Technology, Nanjing. His current research interests include image and vision analysis and machine learning.

Second Co- Guest Editor:

Dr. Warren Huang-Chen Lee,

Associate Professor,

Department of Communications Engineering & Electrical Engineering,

National Chung Cheng University,

Taiwan.

Email: [email protected]

Google Scholar: https://scholar.google.com/citations?user=AyouaDAAAAAJ&hl=en

Dr. Huang-Chen Lee is currently working in National Chung Cheng University, Taiwan. He received the Ph.D. degree from the National Tsing-Hua University, Hsin-Chu, Taiwan, in 2010. He has also worked in the industry since 2000 and has a wide breadth of experience in designing personal digital assistant/cellular phones and low-power embedded systems. Dr.Lee joined the Department of Communications Engineering and Electrical Engineering at National Chung-Cheng University, Taiwan in 2011 and promoted to associate professor since 2015. He had been elevated to IEEE senior member since 2012. He has been Associate Editor of the IEEE Transactions on Instrumentation and Measurement in 2015, also Associate Editor of the IEEE Sensors Journal in 2017. He has a strong track record of collaborating with industry partners for transfer technologies from the academic research projects. His research topics are mainly related to wireless sensor, mesh networking, the internet of thing (IoT) and low-power embedded system. He received award for Outstanding Associate Editor of IEEE Transactions on Instrumentation and Measurement from 2017 to 2019, three years in a row.

Third Co- Guest Editor:

Dr. Nam P. Nguyen

Associate Professor,

Department of Information and Computer Sciences,

Towson University,

USA.

Email: [email protected]

Google Scholar: https://scholar.google.com/citations?user=aJcBWkgAAAAJ&hl=en

Dr. Nam Nguyen is currently an Associate Professor in the Information and Computer Sciences Department, Towson University, USA. Dr. Nguyen received his PhD in Computer Engineering from the University of Florida, USA. His research interests include Social network analysis & Big Data mining, Cyber Security and Mobile-aware computing. Dr. Nguyen currently serves in the Editorial board of the Computational Social Networks journal, the Mathematical Foundations of Computing journal, and Frontiers in Big Data journal. Dr. Nguyen has been serving as organization and TPC member for several conferences including IEEE Infocom, ACM Hypertext, IJCAI, etc. Dr. Nguyen has also been a panelist serving several National Science Foundation panels.

Fourth Co- Guest Editor:

Dr. Claudio Savaglio

Department of Computer Science, Modeling,

Electronics and Systems Engineering (DIMES),

University of Calabria, Italy.

Email: csavag[email protected]

Google Scholar: https://scholar.google.it/citations?user=VR5qJdIAAAAJ&hl=en

Dr. CLAUDIO SAVAGLIO is a Researcher at ICAR-CNR Institute, Italy. He received the Ph.D. degree in ICT from the University of Calabria (Unical), Italy, in 2018. Dr. Savaglio was a Visiting Researcher at the University of Texas at Dallas (TX, USA) in 2013, at the New Jersey Institute of Technology (NJ, USA) in 2016, and at the Universitat Politècnica de València (Spain) in 2017. He was also Temporary Research Fellow at the University of Calabria (Unical), where he was Teacher Assistant and Adjunct Professor (2018-2020). He currently serves as Guest Editor for the Journal of Computers & Electrical Engineering (CAEE), Sensors and IET journal. He has also served as a technical program committee member for many premium conferences in the areas of IoT, computer communications and networks such as GIOTS, ICC, and ICCCN. He has published more than 40 prestigious conference and journal papers. His research interests include the Internet of Things (IoT), network simulation, edge computing, and agent-oriented development methodologies.

Fifth Co- Guest Editor:

Dr. Ying Zhang

School of Information and Communication Engineering,

University of Electronic Science and Technology of China

Email: [email protected], [email protected]

Google Scholar: https://scholar.google.com/citations?hl=de&user=MwnsRL8AAAAJ&view_op=list_works&sortby=pubdate

Dr. YIN ZHANG is a Full Professor of the School of Information and Communication Engineering, University of Electronic Science and Technology of China. He is a Distinguished Scholar of Hubei Province, China. He is Co-chair of IEEE Computer Society Big Data STC. He serves as editor or associate editor for IEEE Network, Information Fusion, IEEE Access, etc. He is a Guest Editor for IEEE Transactions on Network Science and Engineering, Future Generation Computer Systems, IEEE IoT Journal, ACM/Springer Mobile Networks & Applications, Sensors, Neural Computing and Applications, Multimedia Tools and Applications, Wireless Communications and Mobile Computing, Electronic Markets, Journal of Medical Systems, New Review of Hypermedia and Multimedia, etc. He also served as Track Chair of IEEE CSCN 2017, TPC Co-Chair of CloudComp 2015 and TRIDENTCOM 2017, etc. He has published more than 100 prestigious conference and journal papers, including 14 ESI Highly Cited Papers. He is an IEEE Senior Member since 2016. He got the Systems Journal Best Paper Award of the IEEE Systems Council in 2018. He was named in Clarivate Analytics Highly Cited Researchers List in 2019. His research interests include mobile computing, edge intelligence, cognitive wireless communications, etc.

Sixth Co- Guest Editor:

Dr. Braulio Dumba

IBM Thomas J. Watson Research Center,

Yorktown Heights, USA

Email: [email protected]

Dr. Braulio Dumba is a Research Scientist at IBM T.J Watson Research Center in Yorktown Heights, NY under the Hybrid Cloud organization. His current research is in Multi-Cloud and Hybrid Cloud Services with focus on security and compliance for hybrid cloud applications and resources. Braulio earned the International Baccalaureate from the United World College of the Adriatic (UWCad) in 2007. He has also earned a BSc in Physics and Computer Science with a minor in Mathematics from Luther College where he received the distinct “John G. and Mildred Breiland Endowed Scholarship Fund” and was selected to be a member of “Pi Mu Epsilon, National Honorary Mathematics Society”. He earned a Ph.D. in Computer Science from University of Minnesota, Twin Cities, with a concentration in Computer Networks in 2018. His research interests lie in the area of network science, cloud computing, computer networks and distributed systems.

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