Embedded system reconfigurable architecture for data mining and mobile applications

Dealing with large amount of information and finding interesting knowledge from them become a huge problem nowadays. Data-mining applications are on a very huge demand in all aspects of human life. Increasingly, the exponential growth of information demands computing platforms with higher processing power. Providing more processing powers to embedded mobile (portable) devices is a challenging problem because mobile devices have stringent constraints such as area, power consumption, memory bandwidths, cost, etc. to overcome this challenge effectively and efficiently, optimized hardware architectures are needed.

A significant amount of time approximately 93% to 98% is spent on data transfer between the external memories, which is a major performance bottleneck. Hardware designs need to be developed towards reduction of the memory access latency.

Reconfigurable systems, exploiting a mixture of the traditional CPU-centric instruction-stream-based processing with the decentralized parallel application-specific data-dominated processing, provide a drastically higher performance and lower power consumption than the traditional CPU-centric systems. Embedded systems are real time systems, including sensing, interfacing, processing and / or actuating sub systems and involve in their implementation various mixtures of digital and analog hardware and embedded software.

Extra hardware in optimization techniques results in larger area. It is important to consider the speed-space trade-offs, especially in mobile and embedded devices. It is necessary to create partial and dynamic reconfigurable hardware architectures for the selected data-mining application to reduce the on-chip occupied area. It is also necessary to introduce architectures and techniques to address the on-chip memory bandwidths limitations on FPGAs. Other challenges include Improvements in code (HDL) optimization, power consumption in mobile and embedded devices.

Potential topics included, but not limited

• Run-Time Partial Reconfiguration of hardware architectures for data mining and mobile applications

• Efficient Embedded Architectures for power Management in mobile devices

• Dynamic partial reconfigurable hardware architecture for mobile and embedded devices
• Embedded and reconfigurable architectures, techniques, and methodologies for data mining applications on portable devices
• Reconfigurable hardware architecture for mobile and embedded devices

• Secure, and Predictable Software/hardware Architecture for data mining and mobile applications
• FPGA implementations of data mining algorithms in portable devices 

Schedule:

• Submission due date : 10 May 2021
• First decision (minor revision/ reject) : 30 June 2021
• Revised submission due date : 15 August 2021
• Final decision : 15 September 2021
• Publication : 30 December 2021

Guest Editors :

Dr.Sheldon Williamson (Managing Guest Editor)

Canada Research Chair in Electric Energy Storage Systems for Transportation Electrification

Professor, Electrical, Computer and Software Engineering

Faculty of Engineering and Applied Science

OntarioTech University, Canada

Email: sheldon.ouit@gmail.com ; sheldon.williamson@ontariotechu.ca

Web page : https://ontariotechu.ca/experts/feas/sheldon-williamson.php

Dr.Peeter Ellervee

Professor of Computer Engineering, Tallinn University of Technology

Estonia

Email : lrv@ati.ttu.ee

Webpage : https://www.etis.ee/CV/Peeter_Ellervee/est

Dr.Houbing Song

Assistant Professor of Electrical Engineering and Computer ScienceEmbry-Riddle Aeronautical University, Daytona Beach, Florida, United States. Email :

Houbing.Song@erau.edu

Webpage : https://faculty.erau.edu/Houbing.Song