VLSIC 2020 : IEEE Symposium on VLSI Circuits (VLSIC)

in Conferences   Posted on September 5, 2019 

Conference Information

Submission Deadline Monday 10 Feb 2020 Proceedings indexed by :
Conference Dates Jun 14, 2020 - Jun 19, 2020
Conference Address Honolulu, United States
Conference & Submission Link https://vlsisymposium.org/
Conference Organizers : ( Deadline extended ? Click here to edit )

Conference Ranking & Metrics (This is a TOP Conference)

Impact Score 2.81
#Contributing Top Scientists 27
#Papers published by Top Scientists 56
Google Scholar H5-index 28
Guide2Research Overall Ranking: 273
Category Rankings
Hardware, Robotics & Electronics 46
Proceedings https://ieeexplore.ieee.org/xpl/conhome/1000798/all-proceedings
DBLP Page https://dblp.uni-trier.de/db/conf/vlsic

Conference Call for Papers

The VLSI Symposia is an international conference on semiconductor technology and circuits that offers an opportunity to interact and synergize on topics spanning the range from process technology to systems-on-chip.

Celebrating its 40th edition (1981-2020), the VLSI Technology symposium calls for papers in the following areas:
• Technologies for IOT including ultra-low power technologies;
wearable devices/sensors, display, connectivity, power
management; micro-controllers and application processors.
• Technologies for AI including CPU, GPU, in-memory computing,
neuromorphic devices, and stochastic computing.
• Stand-Alone and Embedded Memories technology and
reliability for SRAM, DRAM, 3D NAND and NOR Flash, MRAM,
PCRAM, ReRAM, FeRAM and other new memories.
• CMOS Technology, Microprocessors and SoCs including
scaling, VLSI manufacturing concepts, and yield optimization.
• RF / Analog / Digital Technologies and Sensors for mixedsignal SoC; RF front-end; analog, mixed-signal, I/O, highvoltage, MEMS, integrated sensors; power electronics.
• Process and Material Technologies including advanced
transistor process and architecture, modeling and reliability;
high mobility channels; wide bandgap semiconductors and
1D and 2D materials and devices; advanced lithography;
heterogeneous integration; interconnects scaling.
• Packaging Technologies and System-in-Package (SiP)
including through-silicon-vias (TSVs) and 3D-system integration.
• Photonics Technology, Imaging, and Beyond CMOS Devices
Papers will be selected based on technical innovation, advances
relative to previously published work, credibility of claims, and
quality of writing and illustrations

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