Submissions are solicited on new research results and detailed tutorial expositions related to field-programmable technologies, including but not limited to:
Tools and Design Techniques for field-programmable technology including placement, routing, synthesis, verification, debugging, runtime support, technology mapping, partitioning, parallelization, timing optimization, design and run-time environments, high-level synthesis (HLS) compilers, languages and modeling techniques, provably-correct development, intellectual property core-based design, domain-specific development, hardware/software co-design.
Architectures for field-programmable technology including field-programmable gate arrays, complex programmable logic devices, coarse-grained reconfigurable arrays, field-programmable interconnect, field-programmable analogue arrays, field-programmable arithmetic arrays, memory architectures, interface technologies, low-power techniques, adaptive devices, reconfigurable computing systems, high-performance reconfigurable systems, evolvable hardware and adaptive computing, fault tolerance and avoidance.
Device technology for field-programmable logic including programmable memories such as non-volatile, dynamic and static memory cells and arrays, interconnect devices, circuits and switches, and emerging VLSI device technologies.
Applications of field-programmable technology including accelerators for biomedical/scientific/neuro-morphic computing and machine learning, network processors, real-time systems, rapid prototyping, hardware emulation, digital signal processing, interactive multimedia, machine vision, computer graphics, cryptography, robotics, manufacturing systems, embedded applications, evolvable and biologically-inspired hardware.
Education for field-programmable technology including courses, teaching and training experience, experiment equipment, design and applications.