ICCD 2021 : International Conference on Computer Design

in Conferences   Posted on March 17, 2021 

Conference Information

Submission Deadline Friday 28 May 2021 Proceedings indexed by :
Conference Dates Oct 24, 2021 - Oct 27, 2021
Conference Address Online, Online
Conference & Submission Link https://www.iccd-conf.com/Home.html
Conference Organizers : ( Deadline extended ? Click here to edit )

Conference Ranking & Metrics (This is a TOP Conference)

Impact Score 2.97
#Contributing Top Scientists 43
#Papers published by Top Scientists 47
Google Scholar H5-index 20
Number of Editions: 39
Guide2Research Overall Ranking: 255
Category Rankings
Graphics & Computer-Aided Design 18
Proceedings https://ieeexplore.ieee.org/xpl/conhome/1000129/all-proceedings

Conference Call for Papers

Track 1. Computer Systems: Systems architecture and software (compiler, programming language/model, firmware, OS, hypervisor, runtime) design and co-design for embedded/real-time systems; System support and compilers for multi/many cores, co-processors, and accelerators; System support for security, reliability, and energy efficiency and proportionality; Virtual memory; Systems support for emerging technologies, including NVM, quantum, neuromorphic, bio-inspired computing, machine learning and artificial intelligence applications; Specialized OS, runtime, and storage systems for data center and cloud/edge computing, high-performance computing (HPC) and exascale system.

Track 2. Processor Architecture: Microarchitecture design techniques for single-threaded and multi/many-core processors, such as instruction-level parallelism, pipelining, caches, branch prediction, multithreading, and networks-on-chip; Techniques for low-power, secure, and reliable processor architectures; Hardware acceleration for emerging applications including NVM, quantum, neuromorphic, bio-inspired, machine learning and artificial intelligence; Hardware support for processor virtualization; Real-life design challenges: case studies, tradeoffs, postmortems.

Track 3. Test, Verification, and Security: Design error debug and diagnosis; Fault modeling; Fault simulation and ATPG; Analog/RF testing; Statistical test methods; Large volume yield analysis and learning; Fault tolerance; DFT and BIST; Functional, transaction-level, RTL, and gate-level modeling and verification of hardware designs; Equivalence checking, property checking, and theorem proving; Constrained-random test generation; High-level design and SoC validation; Hardware security primitives and methodologies; Side-channel analysis, attacks and mitigations for processors and accelerators; Interaction between test, security and trust.

Track 4. Electronic Design Automation: Design error debug and diagnosis; Fault modeling; Fault simulation and ATPG; Analog/RF testing; Statistical test methods; Large volume yield analysis and learning; Fault tolerance; DFT and BIST; Functional, transaction-level, RTL, and gate-level modeling and verification of hardware designs; Equivalence checking, property checking, and theorem proving; Constrained-random test generation; High-level design and SoC validation; Hardware security primitives and methodologies; Side-channel analysis, attacks and mitigations for processors and accelerators; Interaction between test, security and trust.

Track 5. Logic and Circuit Design: Circuits and design techniques for digital, memory, analog and mixed-signal systems; Circuits and design techniques for high performance and low power; Circuits and design techniques for robustness under process variability, electromigration, and radiation; Design techniques for emerging and maturing technologies (MEMS, nano-spintronics, quantum, flexible electronics, multi-gate devices, in-memory computing); Asynchronous circuit design; Signal-processing, graphic-processor, and datapath circuits.

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