Emerging Architectures for Energy-efficient and Real-time Cyber-physical Systems

  in Special Issue   Posted on May 7, 2020

Information for the Special Issue

Submission Deadline: Mon 09 Mar 2020
Journal Impact Factor : 1.161
Journal Name : Microprocessors and Microsystems
Journal Publisher:
Website for the Special Issue: https://www.journals.elsevier.com/microprocessors-and-microsystems/call-for-papers/emerging-architectures-for-energy-efficient-and-real-time
Journal & Submission Website: https://www.journals.elsevier.com/microprocessors-and-microsystems

Special Issue Call for Papers:

The current generation of Cyber-physical Systems (CPS) has evolved from the original idea of isolated Embedded Systems to become a complex scenario where smart processing nodes tightly interact with physical entities such as sensors networks and I/O devices. 

In recent years, the integration of a whole set of technologies, usually referred to as Internet-of-Things (IoT), enabled a flourishing ecosystem of architectures and platforms where smart objects, users and communication infrastructures interact to support intelligent context-aware services and applications. Energy-aware real-time Systems, smart grids, medical monitoring, smart cities, distributed pollution tracking are just a few examples of concrete applications that are gaining attraction among industries and institutions.

However, such environments impose energy consumption constraints that must be met in a context of increasing computational needs, due to the processing of large amounts of data coming from sensing and input devices. It can be envisaged a trend in which the smartness of the “things” will be even more shifted toward the things themselves rather than toward the cloud. Based on this, improving the computational capabilities of the smart objects in an even more limited energy envelope becomes a key issue.

This Special Issue aims at exploring emerging approaches, ideas and contributions to address the challenges in the design of energy-efficient and real-time smart objects for IoT-enabled CPS.​Potential topics include, but are not limited to:
● Distributed Architectures for Real-time systems
● Energy-efficient Neural Networks
● Energy-aware and Real-time Neural Network inference
● Approximate Computing for energy-efficient Architectures
● Network-on-Chip and Embedded Systems for IoT
● Energy-aware Parallel architectures for high-performance computing
● Distributed real-time software for distributed embedded control system
● Design Platforms and Tools for IoT-based ecosystems for optimizing energy/performance tradeoffs

Submission Guidelines:

The papers must be written in English and describe original research neither published nor currently under review in any other journal or conference. The call and author guidelines for preparation of manuscripts can be found at http://www.elsevier.com/locate/micpro. All manuscripts and any supplementary material should be submitted to the Elsevier online submission system Evise of the MICPRO journal, available at: https://www.evise.com/profile/#/MICPRO/login. Please select “SI: Emerging CPS ” from the special issue drop-down list (NOT any other special or regular issue).

Important Dates

Submission deadline: Sep 30, 2020Acceptance deadline: Jan 30, 2021

Lead Guest Editor
Dr.Davide Patti,
Dipartimento di Ingegneria Elettrica Elettronica ed Informatica, University of Catania, Italy

Guest Editors
Masoud Daneshtalab,
Department of Electronic Systems, KTH Royal Institute of Technology Sweden,

Dr. Dimitrios A. Karras, Department of Computer Science and Engineering, National &
Kapodistrian University of Athens, Greece, EPOKA University, Tirana.
dkarras@epoka.edu.al , dakarras@uoa.gr

Dr.Varatharajan Ramachandran , Department of Electronics and Communication Engineering,
Bharath University,

Dr.Muhammad Mazhar Ullah Rathore, ( Managing Guest Editor )
Department of Computer Science and Engineering Hammad Bin Khalifa University, Doha, Qatar mrathore@hbku.edu.qa, rathoremazhar@ieee.org

Guest Editor information

Prof. Davide Patti

Davide Patti is an Assistant Professor at the Electric, Electronics, and Computer Engineering Department of the University of Catania (DIEEI). He has published several works on Multi-objective Design Space Exploration, Low-power techniques for Embedded Systems, and Network-on-Chip architectures. Davide Patti has been teaching several courses in the Computer Science field, holding courses in Human-Computer Interaction and Artificial Intelligence at the Faculty of Psychology of Kore University (Enna, Italy) and lectures at the University of Southampton (UK). He is a member of the Steering Committee of the International Workshop on Network on Chip Architectures (NoCArc) held in conjunction Annual IEEE/ACM International Symposium on Microarchitecture and has served as General Chair of the same workshop in 2017. He served as TPC member for several ACM/IEEE conferences, including UPIOT, BigDataSE,CEESD, IGSC, DAC LBR, VLSI Design, ScalCom, SOCC, FUTURE COMPUTING, MES, PEC, SITIS, and as Chair and Organizer for Computing Frontiers, ReCoSoC, ICM, CODES-ISSS. He is also co-author of the Noxim project, currently used by a vast community of researchers working in the area of on-chip communication systems and employed as an experimental platform in more than 500 scientific papers published in refereed ACM and IEEE international conferences and journals.

Webpage: https://www.dieei.unict.it/docenti/davide.patti

Google Scholar: https://scholar.google.com/citations?user=T1QqgR0AAAAJ&hl=ens

Prof. Masoud Daneshtalab

Masoud Daneshtalab (http://www.idt.mdh.se/~md/) is currently an associate professor at Mälardalen University (MDH) and a researcher visitor at Royal Institute of Technology (KTH) in Sweden. He joined KTH as European Marie Curie Fellow in 2014. Before that, he was a university lecturer and group leader at University of Turku in Finland from 2012-2014. He has been appointed as Associate Editors of Elsevier Journals of Computers & Electrical Engineering (CAEE) and Microprocessors and Microsystems (MICPRO) along with World Research Journal of Computer Architecture (JCA); and in the Editorial Board of The Scientific World Journal, International Journal of Distributed Systems and Technologies (IJDST), International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), International Journal of Embedded and Real-Time Communication Systems (IJERTCS), and International Journal of Design, Analysis and Tools for Integrated Circuits and Systems (IJDATICS). He has also served as a Guest Editor for several prestige Journals, like Springer Computing, IET CDT, ACM TECS, ACM JETC, Elseviers’ JSA, MICPRO, Integration, and CEE. He is also the key organizer of SIGMARC ACM/IEEE International workshop Network-on-Chip Architectures (NoCArc / 8 editions) and ACM International workshop on Many-core Embedded Systems (MES / 4 editions). He has represented Sweden in the management committee of the EU COST Actions IC1202: Timing Analysis on Code-Level (TACLe). Since 2016 he is in Eurimicro board of Director and a member of the HiPEAC network. His research interests include on/off-chip interconnection networks, hardware/software co-design, reconfigurable computing, neuromorphic architectures, and evolutionary multi-objective optimization. He has published 1 book, 4 book chapters, and over 180 refereed international journals and conference papers within H-index 24. He is currently in a Technical Program Committee member of different IEEE and ACM conferences, including DAC, DATE, ASPDAC, ICCAD, NOCS, ESTIMedia, VLSI Design, ICA3PP, SOCC, VDAT, DSD, PDP, ICESS, Norchip, MCSoC, CADS, EUC, DTIS, NESEA, CASEMANS, NoCArc, MES, HPIN, PACBB, MobileHealth, and JEC-ECC.

Webpage: http://www.idt.mdh.se/~md/

Google Scholar: https://scholar.google.fi/citations?user=DO0lHt8AAAAJ&hl=en

Dr. Dimitrios Karras

Dimitrios A. Karras received his Diploma and M.Sc. Degree in Electrical and Electronic Engineering from the National Technical University of Athens, Greece in 1985 and the Ph. Degree in Electrical Engineering, from the National Technical University of Athens, Greece in 1995, with honours. From 1990 and up to 2004 he collaborated as visiting professor and researcher with several universities and research institutes in Greece. Since 2004, after his election, he has been with the Sterea Hellas Institute of Technology, Automation Dept., Greece as associate professor in Digital Systems and Signal Processing as well as with the Hellenic Open University, Dept. Informatics as a visiting professor in Communication Systems (the latter since 2002 and up to 2010). He has published more than 65 research refereed journal papers in various areas of intelligent systems and simulation, pattern recognition, image/signal processing and neural networks as well as in bioinformatics and more than 180 research papers in International refereed scientific Conferences. His research interests span the fields of intelligent systems and simulation, pattern recognition and neural networks, image and signal processing, image and signal systems, biomedical systems, communications, networking and security. He has served as program committee member in many international conferences, as well as program chair and general chair in several international workshops and conferences in the fields of signal, image, communication and automation systems. He is, also, former editor in chief (2008-2015) of the International Journal in Signal and Imaging Systems Engineering (IJSISE), academic editor in the TWSJ, ISRN Communications and the Applied Mathematics Hindawi journals as well as associate editor in various scientific journals. He has been cited in more than 1500 research papers, his H/G-indices are 16/32 (Google Scholar) and his Erdos number is 5. His RG score is 30.54 (https://www.researchgate.net/profile/Dimitrios_Karras2/)

Web Page : http://eis.epoka.edu.al/cv/fullcv/301

Google scholar citations


Dr. Ramachandran Varatharajan

R.Varatharajan received his B.E., M.E. and Ph.D. degrees all in Electronics and Communication Engineering from Anna University and Bharath University, India. He is a Associate Editor for Computers and Electrical Engineering , Elsevier and Journal of Medical Imaging and Heath informatics, American scientific publishers. He is a guest editor for Sustainable computing,Cluster computing , Ambient intelligent and humanized computing and he is acting as a leading guest editor for more than 10 SCI indexed journals. His main area of research activity is Medical Image processing, Wireless Networks, Network security and Green engineering. He has served as a reviewer for Springer, Inderscience and Elsevier journals. He has published many research articles in refereed journals like Elsevier and springer. He is a member of IEEE, IACSIT, IAENG, SCIEI and ISTE wireless research group. He has been serving as Organizing Chair and Program Chair of several International conferences and in the Program Committees of several International conferences. Currently he is working as a Associate professor in the Department of Electronics and Communication Engineering at Bharath University, India.

Google scholar citations


Dr. Mazhar Rathore

M. Mazhar Rathore received the master’s degree in computer and communication security from the National University of Sciences and Technology, Pakistan, in 2012. He received the Ph.D. degree in computer science and engineering with Kyungpook National University, South Korea in 2018. He is currently working as a Postdoctoral Researcher with the College of Science and Engineering, Hamad Bin Khalifa University, Doha, Qatar. His research interests include big data analytics, the Internet of Things, smart systems, network traffic analysis and monitoring, remote sensing, smart city, urban planning, intrusion detection, and computer and network security. He is ACM professional member. He is serving as a Reviewer for various IEEE, ACM, Springer, and Elsevier journals.

Google scholar


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