SOCC 2021 : IEEE International System-on-Chip Conference

  in Conferences   Posted on November 20, 2020

Conference Information

Submission Deadline Friday 26 Mar 2021 Proceedings indexed by :
Conference Dates Sep 14, 2021 - Sep 15, 2021
Conference Address Irvine, United States
Conference & Submission Link http://www.socconference.com/
Conference Organizers : ( Deadline extended ? Click here to edit )

Conference Ranking & Metrics (This is a TOP Conference)

Impact Score 1.32
#Contributing Top Scientists 17
#Papers published by Top Scientists 30
Google Scholar H5-index 4
Number of Editions: 18
Guide2Research Overall Ranking: 722
Category Rankings
Hardware, Robotics & Electronics 146
Proceedings https://ieeexplore.ieee.org/xpl/conhome/1000678/all-proceedings

Conference Call for Papers

The International System-on-Chip (SoC) Conference, the premier event devoted to Chip Design and Development. . .

The SoC Conference Organizing Committee & Technical Advisory Board are seeking submissions on all aspects of Chip Design & Development including:
Semiconductor Technology

AI Chips

Blockchain

Machine Learning solutions

Neural interfaces and closed-loop systems; biosensors, microarrays, and lab-on-a-chip; wearable electronics; biomedical SoCs;

3D-IC Design & Packaging

Analog, Mixed-Signal & RF Circuits and Systems

SOI vs. CMOS for Analog & Digital Circuits

CPU/DSP/GPU Cores

High-Performance IO Sub-Systems & Interconnects

Foundry Services & Technologies

Novel CMOS Design Techniques

EDA Tools, Algorithms, and Tool Usage

Design Methodologies, Techniques, and Technologies for All Aspects of Electronic Circuits

FPGA-Based Designs, Tools, and Applications

Wireline and Wireless Communication Circuits and Systems

Static, dynamic, and non-volatile memories for stand-alone and embedded applications

Memory/SSD controllers

High-bandwidth I/O interfaces

Memories based on phase-change, magnetic, spin-transfer-torque, ferroelectric, and resistive materials

Array architectures and circuits to improve low-voltage operation

Power reduction, bit-error management, reliability, and fault tolerance; memory-subsystem enhancements, including in-memory logic functions

Green Circuits, Systems, and Design Methodologies

Embedded Memory Technologies & IPs

Logic Synthesis and Circuit Optimization

Timing and Circuit Analysis and Circuit Optimization

Receivers/transmitters/transceivers for wireline systems, including backplane transceivers, optical links, chip-to-chip communications, 2.5/3D interconnect
IC & IP Design

SiP and Innovative Packing Techniques

Network-on-Chip (NoC) & System-Level Communication & Interconnects

Special-purpose digital circuits, intra-chip communication circuits

Clock-distribution techniques, soft-error and variation-tolerant circuits; Circuits for power management in digital applications

Emerging IC and system solutions for: biomedical applications, sensor interfaces,

Circuit Simulation and Interconnect Analysis

Timing Analysis and Design for Manufacturability

Physical Design and Manufacturability

Power Analysis and Low-Power Design

Validation, Test Planning, Testing and Coverage

Formal Verification

Signal Integrity and Design Reliability

System-Level Design and Co-Design

High-Level Synthesis

Physical Synthesis Tools and Techniques

Low-Power SoC Platforms

Cost-Effective SoC-Based Platform Solutions

Embedded Software, Tools and Design

Embedded Design and Platforms

Floor-Planning

Beyond Die-Integration and

Package/Hybrid/Board Design

Novel Software Architecture for Multicore SoCs

System Level Design Methodology, EDA and Design Tools for SoC

Signal Integrity, Design for Testability, and Design Verification

Design for Manufacturability, Variation-Aware Methodologies

Emerging Specialized Design Technologies

Manufacturing Test and Silicon Debug

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