NOCS 2018 : ACM/IEEE International Symposium on Networks-on-Chip

  in Conferences   Posted on February 15, 2018

Conference Information

Submission Deadline Tuesday 01 May 2018 Proceedings indexed by :
Conference Dates Oct 4, 2018 - Oct 5, 2018
Conference Address Torino, Italy
Conference & Submission Link https://www.nocs2018.conf.kth.se/
Conference Organizers : ( Deadline extended ? Click here to edit )

Conference Ranking & Metrics (This is a TOP Conference)

Guide2Research Overall Ranking: 318
Category Rankings
Networks and Communications 85

Google Scholar H5-index:
16

Conference Call for Papers

The International Symposium on Networks-on-Chip (NOCS) is the premier event dedicated to interdisciplinary research on on-chip, package-scale, and rack-scale communication technology, architecture, design methods, applications and systems. NOCS brings together scientists and engineers working on NoC innovations and applications from inter-related research communities, including discrete optimization and algorithms, computer architecture, networking, circuits and systems, packaging, embedded systems, and design automation. Topics of interest include, but are not limited to:

NoC Architecture and Implementation

Network architecture (topology, routing, arbitration)
Timing, synchronous/asynchronous communication
NoC reliability issues and solutions
Power and thermal issues at the NoC un-core and system-level
Network interface issues and solutions
Signaling and circuit design for NoC links and routers

NoCs for Intelligent Physical Systems

Mapping of existing and emerging applications onto NoC
NoC case studies, application-specific NoC design
NoC for FPGAs, structured ASICs, CMPs and MPSoCs
NoC designs for heterogeneous systems, fused CPU-GPU and data-center- on-a-chip (DCoC) architectures
Scalable modeling of NoC
Machine learning for NoC and NoC-based Systems

NoC and Communication Analysis, Optimization, and Verification

NoC performance analysis and Quality of Service
Modeling, simulation, and synthesis of NoC
Verification, debug and test of NoC
NoC design and simulation methodologies and tools
Metrics, benchmarks, and experiences on NoC-based hardware
Communication efficient algorithms
Communication workload characterization and evaluation

NoC at the Un-Core and System-level

Design of memory subsystem (un-core) including memory controllers, caches, cache coherence protocols in NoC
In-memory/In-storage network and NoC for new memory/storage technologies
NoC support for memory and cache access
OS support for NoCs
Security issues and solutions in NoC architectures
Programming models including shared memory, message passing and novel programming models
Issues related to large-scale systems (datacenters, supercomputers, edge and fog computing) with NoC-based systems as building blocks

Novel NoC Technologies

Optical, wireless, carbon nanotube, and other emerging technologies
NoCs for 3D and 2.5D packages
Package-specific NoC design
Network coding and compressed solutions for efficient terabyte NoC architectures
Approximate computing for NoC and NoC-based systems

Inter/Intra-Chip and Rack-Scale Network

Unified inter/intra-chip networks
Hybrid chip-scale and rack-scale networks
All aspects of inter-chip network design
All aspects of rack-level network design

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