MICRO 2018 : IEEE/ACM International Symposium on Microarchitecture

  in Conferences   Posted on February 13, 2018

Conference Information

Submission Deadline Wednesday 28 Mar 2018
Conference & Submission Link http://ww.microarch.org/micro50/
Conference Dates Oct 14, 2018 - Oct 18, 2018
Conference Address Boston, United States
Proceedings indexed by
Conference Organizers : ( Deadline extended ? Click here to edit )

Conference Ranking & Metrics (This is a TOP Conference)

Google Scholar H5-index: 41
CORE 2017 Rating: A
Guide2Research Overall Ranking: 64
Category Rankings
Hardware, Robotics & Electronics 10
Signal Processing 18

Conference Call for Papers

The International Symposium on Microarchitecture (MICRO) is the premier forum for the presentation and discussion of new ideas in microarchitecture, compilers, hardware/software interfaces, and design of advanced computing and communication systems. The goal of MICRO is to bring together researchers in the fields of microarchitecture, compilers, and systems for technical exchange. The MICRO community has enjoyed having close interaction between academic researchers and industrial designers—we aim to continue and strengthen this longstanding tradition at the 50th MICRO in Boston, Massachusetts.
Important Dates
Abstract March 28th, 2017 at 11:59pm EST
Full Paper April 4th, 2017 at 11:59pm EST
Rebuttal and Response June 1st – June 14th 2017
Notification July 5th 2017

PDF Version

We invite original paper submissions related to (but not limited to) the following topics:

Processor, memory, interconnect, and storage architectures.
Hardware, software, and hybrid techniques for improving system performance, energy-efficiency, cost, complexity, predictability, quality of service, reliability, dependability, security, scalability, programmer productivity, etc.
Architectures for instruction-level, thread-level, and memory-level parallelism: superscalar, VLIW, data-parallel, multithreaded, multicore, manycore, etc.
Compiler and microarchitectural techniques for parallelism (ILP, TLP, MLP).
Low-power, high-performance, and cost/complexity-efficient architectures.
Architectures for emerging platforms, including smartphones, cloud/datacenter, etc.
Architectures and compilers for embedded processors, DSPs, GPUs, ASIPs (network processors, multimedia, wireless, deep learning, neuromorphic, etc.).
Advanced software/hardware speculation and prediction schemes.
Microarchitecture techniques to better support system software, programming languages, programmability, and compilation.
Microarchitecture modeling and simulation methodology.
Insightful experimental and comparative evaluation and analysis of existing microarchitectures, hardware/software mechanisms and workloads.

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