FPGA 2018 : Symposium on Field Programmable Gate Arrays

  in Conferences   Posted on August 3, 2017

Conference Information

Submission Deadline Sunday 17 Sep 2017
Conference & Submission Link http://isfpga.org/
Conference Dates Feb 25, 2018 - Feb 27, 2018
Conference Address Monterey Marriott Hotel, United States
Proceedings indexed by
Conference Organizers : ( Deadline extended ? Click here to edit )

Conference Ranking & Metrics (This is a TOP Conference)

Google Scholar H5-index: 24
CORE 2017 Rating:
Guide2Research Overall Ranking: 182
Category Rankings
Software Engineering & Programming 43
Hardware, Robotics & Electronics 29
Signal Processing 44

Conference Call for Papers

The ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2018) is the premier conference for presentation of advances in FPGA technology. Accepted papers will be published in the conference proceedings and available in the ACM Digital Library.

Types of Submissions Sought

1. Research Papers

As usual, we solicit research papers related to the following areas:

FPGA Architecture: Architectures for programmable logic fabrics or their components, including routing, flexible logic cells, embedded blocks (memory, DSP, processors), and I/O interfaces. Novel commercial architectures and architectural features.
FPGA Circuit Design: Circuits and layout techniques for design of FPGAs. Impact of future process and design technologies on FPGAs. Methods for analyzing and improving static and dynamic power, power and clock distribution, yield, manufacturability, security, reliability, and testability. Use of novel memory or nano-scale devices in FPGAs.
CAD for FPGAs: Algorithms for synthesis, technology mapping, logic and timing optimization, clustering, placement, and routing of FPGAs. Novel design software for system-level partitioning, debug, and verification. Algorithms for modeling, analysis and optimization of timing and power.
High-Level Abstractions and Tools for FPGAs: General-purpose and domain-specific languages, tools, and techniques to facilitate the design, debugging and verification of FPGA-based applications and systems. Examples include hardware/software co-design, high-level synthesis, digital signal processing, compute acceleration, networking, and embedded systems.
FPGA-based and FPGA-like Computing Engines: Systems and software for compiled accelerators, reconfigurable computing, adaptive computing, and rapid-prototyping.
Applications and Design Studies: Implementation of novel designs on FPGAs to achieve high-performance, low-power, security or high-reliability, making use of the unique flexibility provided by FPGA architectures. Application-domain studies to analyze or improve FPGA architectures.

Research submissions may be either:

Full: at most 10 pages, for a full presentation at the conference; or
Short: at most 6 pages, for a brief presentation.

A paper submitted as either full or short will only be considered in that category.

2. Tutorial Papers on Emerging Applications / Methodologies

The conference will include a Sunday workshop is oriented toward users of FPGAs: be it deep learning implementations, computer security or other emerging topics of interest. For this category, we solicit tutorial papers describing effective design techniques and design flows. The ideal submission will enable beginning researchers to enter the area, current researchers to broaden their scope, and practitioners to gain new and applicable skills. Tutorial submissions need not present novel research results, but should integrate expert practical and/or research knowledge related to FPGAs for a broader audience. This may include:

Technical descriptions of new commercial or academic design tools of general interest;
Insightful summaries of the state-of-the-art that suggest open research problems; and
In-depth design tutorials and design experiences.

Tutorial submissions should be at least 4 and at most 10 pages. Accepted submissions will be published in the proceedings and allocated a presentation time of up to one hour, appropriate to the content.

3. Panel Discussion Proposals

We also solicit proposals for the panel discussion at the conference banquet. The submission should outline the topic, questions to be addressed, and suggested speakers.

Submission Process

Submissions of all types should be made in the form of an English language PDF file, on-line at http://www.isfpga.org. Papers should use one of the ACM format templates posted at http://www.acm.org/sigs/pubs/proceed/template.html. Submissions must be received by September 17, 2017 at 11:59 PM (in any time zone).

Submissions will be considered for acceptance as full or short regular papers, workshop papers, or posters. Regular submissions related to the workshop topic may be scheduled for presentation during the workshop. Regular or workshop submissions will also be considered for acceptance as a poster. A paper submitted to the short or full paper category will only be considered in that category.

The FPGA Symposium uses a double-blind reviewing system. Manuscripts must not identify authors or their affiliations; those that do will not be considered. Exceptions may be allowed, with prior approval of the Program Chair, in cases where the authors’ identity is vital to evaluating the paper (e.g., papers presenting updates of infrastructure used by the FPGA community). References to the authors’ prior work should be made in the 3rd person, in the same way one would reference work by others. If necessary to maintain anonymity, citations may be shown as \”Removed for blind review\”, but consider that this may impede a thorough review if the removed citation is crucial to understanding the submission.

Important dates:

Submissions due:

September 17, 2017

Notification of acceptance:

Mid-November, 2017

Camera-ready copy of accepted papers due:

Early December, 2017

Contact Information

For questions about the submission process or technical program:

Kia Bazargan, Program Chair FPGA 2018
Department of Electrical and Computer Engineering
University of Minnesota

200 Union St SE

Minneapolis, MN 55455, USA

programchair@isfpga.org

For general questions about the conference:

Jason Anderson, General Chair FPGA 2018
Dept. of Electrical and Computer Engineering, University of Toronto

10 King\’s College Road

Toronto, ON M5S 3G4 CANADA
generalchair@isfpga.org

Organizing Committee

General Chair: Jason H. Anderson, University of Toronto, generalchair@isfpga.org.
Program Chair: Kia Bazargan, University of Minnesota, programchair@isfpga.org .
Finance Chair: Jonathan Greene, Microsemi Corp, financechair@isfpga.org
Publicity Chair: Nachiket Kapre, University of Waterloo, publicitychair@isfpga.org

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