CASES 2020 : International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

  in Conferences   Posted on June 5, 2020

Conference Information

Submission Deadline Friday 03 Apr 2020 Proceedings indexed by :
Conference Dates Sep 20, 2020 - Sep 25, 2020
Conference Address Online, Online
Conference & Submission Link
Conference Organizers : ( Deadline extended ? Click here to edit )

Conference Ranking & Metrics (This is a TOP Conference)

Guide2Research Overall Ranking: 379
Category Rankings
Software Engineering & Programming 122
Hardware, Robotics & Electronics 50

Google Scholar H5-index:

Conference Call for Papers

CASES is a premier forum where researchers, developers and practitioners exchange information on the latest advances in compilers and architec-tures for high-performance, low-power, and domain-specificembedded systems. The conference has a long tradition of showcasing leading edge research in embedded architectures for processor, memory, interconnect, and storage, as well as related compiler techniques targeting performance, power, security, reliability,predictabilityissues for both traditional and emerging application domains. We also invite innovative papers address-ing design, synthesis &optimization challenges in heterogeneous, acceler-ator-rich architectures.Compilers for Embedded Systems:Compilation for power and performance; Compiler support for CPU, GPU, reconfigurable computing, heterogeneousand domain-specific multi-core SoC; Compilation for memory, storage, and on-chip communications. Processor Architectures:Embedded and mobile pro-cessor micro-architecture,Multi-and many-core processors, GPU architectures, Reconfigurable com-puting includingFPGAs and CGRAs, Application-Spe-cific processor design,3D-stacked architectures;Power-andenergy-efficient architectures.Memoryand Storage:Memory system architecture;Non-volatile and other emerging memory technolo-gies;Scratchpad memory, caches and compiler-con-trolled memories; storage organizationincluding flash storage.On-chip communication and I/O:Networks-on-chip architectures and design methodologies; on-chip communication synthesis, analysis, and optimization; I/O management in embedded systems.Accelerators:Synthesis, optimization,and design-space exploration of high-performance,low-power accelerators; Novel design paradigmsand compilersfor accelerators including approximate computing, machine learningand big-data analytics.Security, Reliability, and Predictability:Secure ar-chitectures, hardware security, and compilation for software security; Architecture and compiler tech-niques for reliability and aging; Modeling, design, analysis, and optimization for timing and predictabil-ity; Validation, verification, testing &debugging of embedded software. EmergingApplications:Architectures,accelerators, and compilersfor machine learning, neuromorphic &cognitive computing, data analytics; biologically in-spired computing systems.Trustworthy IoT:A specialday will be jointly orga-nized by the conferencesin ESWEEK. Articles alignedto the topics of interestfor CASES, withdistinct focus on Trustworthy IoTare most welcome.

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