CASES 2019 : International Conference on Compilers, Architectures, and Synthesis for Embedded Systems

  in Conferences   Posted on February 3, 2019

Conference Information

Submission Deadline Friday 12 Apr 2019 Proceedings indexed by :
Conference Dates Oct 13, 2019 - Oct 18, 2019
Conference Address New York City, United States
Conference & Submission Link
Conference Organizers : ( Deadline extended ? Click here to edit )

Conference Ranking & Metrics (This is a TOP Conference)

Guide2Research Overall Ranking: 351
Category Rankings
Hardware, Robotics & Electronics 50
Software Engineering & Programming 116

Google Scholar H5-index:

Conference Call for Papers


CASES 2019

Call for Papers

International Conference on

Compilers, Architectures, and Synthesis for Embedded Systems

October 13 – October 18, 2019, New York City, USA


CASES is a premier forum where researchers, developers and practitioners

exchange information on the latest advances in compilers and

architectures for high-performance, low-power embedded systems. The

conference has a long tradition of showcasing leading edge research in

embedded processor, memory, interconnect, storage architectures and

related compiler techniques targeting performance, power, security,

reliability, predictability issues for both traditional and emerging

application domains. We also invite innovative papers addressing design,

synthesis & optimization challenges in heterogeneous, accelerator-rich





Journal-Track Submissions

– Abstract: April 5, 2019

– Full Paper: April 12, 2019 (firm)

Work-in-Progress Submissions

– June 7, 2019 (firm)

Notification of Acceptance

– July 10, 2019 (both tracks)


Topics of Interests / Tracks


Compilers for Embedded Systems:

Compilation for power and performance; Compiler support for CPU, GPU,

reconfigurable computing, heterogeneous multi-core SoC; Compilation for

memory, storage, and on-chip communications.

Processor Architectures:

Embedded and mobile processor micro-architecture, Multi- and many-core

processors, GPU architectures, Reconfigurable computing including FPGAs

and CGRAs, Application-Specific processor design, 3D-stacked

architectures; Power- and energy-efficient architectures.

Memory and Storage:

Memory system architecture; Non-volatile and other emerging memory

technologies; Scratchpad memory, caches and compiler-controlled memories;

storage organization including flash storage.

On-chip communication and I/O:

Networks-on-chip architectures and design methodologies; on-chip

communication synthesis, analysis, and optimization; I/O management

in embedded systems.


Synthesis, optimization, and Design-space exploration of high-

performance, low-power accelerators; Novel design paradigms for

accelerators including approximate computing and big-data analytics.

Security, Reliability, and Predictability:

Secure architectures, hardware security, and compilation for software

security; Architecture and compiler techniques for reliability and aging;

Modeling, design, analysis, and optimization for timing and

predictability; Validation, verification, testing & debugging of embedded


Emerging Applications:

Architectures and accelerators for machine learning, neuromorphic &

cognitive computing, data analytics; biologically inspired computing


Special Day on the Internet of Medical Things:

A special day will be jointly organized by the conferences in ESWEEK.

Articles aligned to the topics of interest for CASES, with distinct

focus on medical devices/ healthcare platforms are welcome.


Paper Process


CASES 2019 has a dual publication model with two tracks: Journal track

papers will be published in the ACM Transactions on Embedded Computing

Systems (TECS) and Work-in-Progress track papers will be published in the

ESWEEK Proceedings. More details at




CASES Program Chairs:

Akash Kumar, Technical University of Dresden, DE

Partha Pratim Pande, Washington State Univ., US

ESWEEK General Chairs:

Petru Eles, Linköping University, SE

Tulika Mitra, National University of Singapore, SG

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